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authorMarek Olšák <[email protected]>2018-07-12 00:17:02 -0400
committerMarek Olšák <[email protected]>2018-07-16 13:32:33 -0400
commit54ad9b444c8e73da498211870e785239ad3ff1aa (patch)
tree542fb17d7bcdd1f9838513f2de883676b579f8bd /src/gallium/drivers/radeonsi/si_state.c
parent3e6888e5d7caaa6b588c94a89010478fad286d99 (diff)
radeonsi: merge DCC/CMASK/HTILE priority flags
For a later simplification. Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index a51b3739f03..7bbb1f63280 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2997,14 +2997,14 @@ static void si_emit_framebuffer_state(struct si_context *sctx)
if (tex->cmask_buffer && tex->cmask_buffer != &tex->buffer) {
radeon_add_to_buffer_list(sctx, sctx->gfx_cs,
tex->cmask_buffer, RADEON_USAGE_READWRITE,
- RADEON_PRIO_CMASK);
+ RADEON_PRIO_SEPARATE_META);
}
if (tex->dcc_separate_buffer)
radeon_add_to_buffer_list(sctx, sctx->gfx_cs,
tex->dcc_separate_buffer,
RADEON_USAGE_READWRITE,
- RADEON_PRIO_DCC);
+ RADEON_PRIO_SEPARATE_META);
/* Compute mutable surface parameters. */
cb_color_base = tex->buffer.gpu_address >> 8;