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authorMarek Olšák <[email protected]>2017-04-23 23:06:38 +0200
committerMarek Olšák <[email protected]>2017-04-26 13:08:05 +0200
commit5c94779585e24e8bd1bd41707521584af4251de3 (patch)
tree9621243bbffa25474b7c39a6439cf616e93f6962 /src/gallium/drivers/radeonsi/si_state.c
parent65e0c3fba74ee98cacadbba4bd005b930609b65e (diff)
radeonsi/gfx9: fix most things wrong with shader images
There are 2 major hw changes: - The address must always point to the address of level 0. GFX9 tiling modes don't allow binding to a non-0 level. - 3D must always be bound as 3D, because 2D and 3D use entirely different tiling modes, and the texture target determines which set of modes is used. Cc: 17.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 8a8705f153d..ec99326dda4 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3189,7 +3189,8 @@ si_make_texture_descriptor(struct si_screen *screen,
if (!sampler &&
(res->target == PIPE_TEXTURE_CUBE ||
res->target == PIPE_TEXTURE_CUBE_ARRAY ||
- res->target == PIPE_TEXTURE_3D)) {
+ (screen->b.chip_class <= VI &&
+ res->target == PIPE_TEXTURE_3D))) {
/* For the purpose of shader images, treat cube maps and 3D
* textures as 2D arrays. For 3D textures, the address
* calculations for mipmaps are different, so we rely on the