diff options
| author | Marek Olšák <[email protected]> | 2015-08-30 00:12:03 +0200 |
|---|---|---|
| committer | Emil Velikov <[email protected]> | 2015-09-06 18:32:09 +0100 |
| commit | a5dee22767c4ea133b93dcbae16c0d08f161e8e1 (patch) | |
| tree | 06782a90c02eaf573cc86a509b35a27df45f9def /src/gallium/drivers/radeonsi/si_state.c | |
| parent | 1aea7812b0c55f82d0411cefba8a821d7b84b504 (diff) | |
radeonsi: set all 16 viewport Z bounds for GL 4.1
Cc: 11.0 <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Acked-by: Christian König <[email protected]>
(cherry picked from commit 08775a219628611989ab87c621255ac3c841dcda)
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index e610b48d80b..aa4a5fe7af5 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3180,6 +3180,7 @@ static void si_init_config(struct si_context *sctx) unsigned rb_mask = sctx->screen->b.info.si_backend_enabled_mask; unsigned raster_config, raster_config_1; struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state); + int i; if (pm4 == NULL) return; @@ -3210,6 +3211,11 @@ static void si_init_config(struct si_context *sctx) si_pm4_set_reg(pm4, R_02882C_PA_SU_PRIM_FILTER_CNTL, 0); + for (i = 0; i < 16; i++) { + si_pm4_set_reg(pm4, R_0282D0_PA_SC_VPORT_ZMIN_0 + i*8, 0); + si_pm4_set_reg(pm4, R_0282D4_PA_SC_VPORT_ZMAX_0 + i*8, fui(1.0)); + } + switch (sctx->screen->b.family) { case CHIP_TAHITI: case CHIP_PITCAIRN: @@ -3296,8 +3302,6 @@ static void si_init_config(struct si_context *sctx) si_pm4_set_reg(pm4, R_028230_PA_SC_EDGERULE, 0xAAAAAAAA); /* PA_SU_HARDWARE_SCREEN_OFFSET must be 0 due to hw bug on SI */ si_pm4_set_reg(pm4, R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0); - si_pm4_set_reg(pm4, R_0282D0_PA_SC_VPORT_ZMIN_0, 0); - si_pm4_set_reg(pm4, R_0282D4_PA_SC_VPORT_ZMAX_0, fui(1.0)); si_pm4_set_reg(pm4, R_028820_PA_CL_NANINF_CNTL, 0); si_pm4_set_reg(pm4, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, fui(1.0)); si_pm4_set_reg(pm4, R_028BEC_PA_CL_GB_VERT_DISC_ADJ, fui(1.0)); |