diff options
| author | Marek Olšák <[email protected]> | 2014-04-23 16:15:36 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2014-07-18 01:58:58 +0200 |
| commit | 09056b352d6de42d24decafdcd6819ad70dc98f1 (patch) | |
| tree | a01e2e6d914a09447e5106891d1164d994ce9a24 /src/gallium/drivers/radeonsi/si_state.c | |
| parent | a66d9341393b9a82aa197e8bab942c6de1ecf02e (diff) | |
radeonsi: use an SGPR instead of VGT_INDX_OFFSET
The draw indirect packets cannot set VGT_INDX_OFFSET, they can only set user
data SGPRs. This is the only way to support start/index_bias with indirect
drawing.
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 49fba731c5f..c106747a67d 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3209,6 +3209,7 @@ void si_init_config(struct si_context *sctx) S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE)); si_pm4_set_reg(pm4, R_028400_VGT_MAX_VTX_INDX, ~0); si_pm4_set_reg(pm4, R_028404_VGT_MIN_VTX_INDX, 0); + si_pm4_set_reg(pm4, R_028408_VGT_INDX_OFFSET, 0); if (sctx->b.chip_class >= CIK) { si_pm4_set_reg(pm4, R_00B118_SPI_SHADER_PGM_RSRC3_VS, S_00B118_CU_EN(0xffff)); |