diff options
| author | Marek Olšák <[email protected]> | 2016-11-13 18:41:43 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2016-11-21 21:44:35 +0100 |
| commit | ed3190b3f3a776fc8c75b1e6130a88079166d115 (patch) | |
| tree | d91eb6553426550e1488f36445c83b143b7162f1 /src/gallium/drivers/radeonsi/si_state.c | |
| parent | d984a324bf8702adde68c006f1c3454233871e1c (diff) | |
radeonsi: don't export ClipVertex and ClipDistance[] if clipping is disabled
This is the first user of optimized monolithic shader variants.
Cull distances can't be disabled by states.
Tested-by: Edmondo Tommasina <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 096c641818e..b3299a95b78 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -644,6 +644,7 @@ static void si_emit_clip_state(struct si_context *sctx, struct r600_atom *atom) static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom) { struct radeon_winsys_cs *cs = sctx->b.gfx.cs; + struct si_shader *vs = si_get_vs_state(sctx); struct tgsi_shader_info *info = si_get_vs_info(sctx); struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; unsigned window_space = @@ -652,7 +653,14 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom) info->writes_clipvertex ? SIX_BITS : info->clipdist_writemask; unsigned ucp_mask = clipdist_mask ? 0 : rs->clip_plane_enable & SIX_BITS; unsigned culldist_mask = info->culldist_writemask << info->num_written_clipdistance; - unsigned total_mask = clipdist_mask | culldist_mask; + unsigned total_mask; + + if (vs->key.opt.hw_vs.clip_disable) { + assert(!info->culldist_writemask); + clipdist_mask = 0; + culldist_mask = 0; + } + total_mask = clipdist_mask | culldist_mask; radeon_set_context_reg(cs, R_02881C_PA_CL_VS_OUT_CNTL, S_02881C_USE_VTX_POINT_SIZE(info->writes_psize) | |