diff options
| author | Marek Olšák <[email protected]> | 2018-02-03 03:19:25 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-02-24 23:08:29 +0100 |
| commit | 2d03c4cac8dfac5cd2ba2f420a2336d3bf516860 (patch) | |
| tree | 4a66ecd789fdb7d8b2e3b2721ab031df63ab915c /src/gallium/drivers/radeonsi/si_shader.h | |
| parent | 190e064e63e3acb603cd63488ea822605f71ac32 (diff) | |
radeonsi: move tess ring address into TCS_OUT_LAYOUT, removes 2 TCS user SGPRs
TCS_OUT_LAYOUT has 13 unused bits. That's enough for a 32-bit address
aligned to 512KB. Hey, it's a 13-bit pointer!
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_shader.h')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.h | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index e0d6f701483..1b1f650f869 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -183,7 +183,7 @@ enum { /* TES */ SI_SGPR_TES_OFFCHIP_LAYOUT = SI_NUM_RESOURCE_SGPRS, - SI_SGPR_TES_OFFCHIP_ADDR_BASE64K, + SI_SGPR_TES_OFFCHIP_ADDR, SI_TES_NUM_USER_SGPR, /* GFX6-8: TCS only */ @@ -191,8 +191,6 @@ enum { GFX6_SGPR_TCS_OUT_OFFSETS, GFX6_SGPR_TCS_OUT_LAYOUT, GFX6_SGPR_TCS_IN_LAYOUT, - GFX6_SGPR_TCS_OFFCHIP_ADDR_BASE64K, - GFX6_SGPR_TCS_FACTOR_ADDR_BASE64K, GFX6_TCS_NUM_USER_SGPR, /* GFX9: Merged shaders. */ @@ -211,8 +209,6 @@ enum { GFX9_SGPR_TCS_OFFCHIP_LAYOUT = GFX9_MERGED_NUM_USER_SGPR, GFX9_SGPR_TCS_OUT_OFFSETS, GFX9_SGPR_TCS_OUT_LAYOUT, - GFX9_SGPR_TCS_OFFCHIP_ADDR_BASE64K, - GFX9_SGPR_TCS_FACTOR_ADDR_BASE64K, GFX9_TCS_NUM_USER_SGPR, /* GS limits */ |