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authorMarek Olšák <[email protected]>2018-08-21 00:46:53 -0400
committerMarek Olšák <[email protected]>2018-08-29 15:31:42 -0400
commitd7250e43048d05d3a4cdfbba4b97806a497ce68a (patch)
tree93336e9e5b6e249c7e26aff675201077943fd11c /src/gallium/drivers/radeonsi/si_query.c
parentc359880d8be41628128ea699676643f4dd426047 (diff)
radeonsi: add SI_QUERY_TIME_ELAPSED_SDMA_SI for measuring DMA on SI
DMA on SI doesn't support the timestamp packet, so it's emulated.
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_query.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_query.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_query.c b/src/gallium/drivers/radeonsi/si_query.c
index 93efbd4ef4a..80e84c23937 100644
--- a/src/gallium/drivers/radeonsi/si_query.c
+++ b/src/gallium/drivers/radeonsi/si_query.c
@@ -92,6 +92,19 @@ static enum radeon_value_id winsys_id_from_type(unsigned type)
}
}
+static int64_t si_finish_dma_get_cpu_time(struct si_context *sctx)
+{
+ struct pipe_fence_handle *fence = NULL;
+
+ si_flush_dma_cs(sctx, 0, &fence);
+ if (fence) {
+ sctx->ws->fence_wait(sctx->ws, fence, PIPE_TIMEOUT_INFINITE);
+ sctx->ws->fence_reference(&fence, NULL);
+ }
+
+ return os_time_get_nano();
+}
+
static bool si_query_sw_begin(struct si_context *sctx,
struct si_query *rquery)
{
@@ -102,6 +115,9 @@ static bool si_query_sw_begin(struct si_context *sctx,
case PIPE_QUERY_TIMESTAMP_DISJOINT:
case PIPE_QUERY_GPU_FINISHED:
break;
+ case SI_QUERY_TIME_ELAPSED_SDMA_SI:
+ query->begin_result = si_finish_dma_get_cpu_time(sctx);
+ break;
case SI_QUERY_DRAW_CALLS:
query->begin_result = sctx->num_draw_calls;
break;
@@ -262,6 +278,9 @@ static bool si_query_sw_end(struct si_context *sctx,
case PIPE_QUERY_GPU_FINISHED:
sctx->b.flush(&sctx->b, &query->fence, PIPE_FLUSH_DEFERRED);
break;
+ case SI_QUERY_TIME_ELAPSED_SDMA_SI:
+ query->end_result = si_finish_dma_get_cpu_time(sctx);
+ break;
case SI_QUERY_DRAW_CALLS:
query->end_result = sctx->num_draw_calls;
break;