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authorMarek Olšák <[email protected]>2014-09-20 12:02:59 +0200
committerMarek Olšák <[email protected]>2014-09-24 14:48:02 +0200
commitc94486670805be0f12ade6a7a2e5c324db4cb798 (patch)
tree800b82b3aa30d9130ddf3f619e8019ee3b848194 /src/gallium/drivers/radeonsi/si_pm4.h
parentdd53d53dc664946a445bcb9e26b1819f4b92a32c (diff)
radeonsi: remove old cache flushing code
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pm4.h')
-rw-r--r--src/gallium/drivers/radeonsi/si_pm4.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pm4.h b/src/gallium/drivers/radeonsi/si_pm4.h
index c7e032a5f7c..f2342862104 100644
--- a/src/gallium/drivers/radeonsi/si_pm4.h
+++ b/src/gallium/drivers/radeonsi/si_pm4.h
@@ -39,16 +39,11 @@ enum chip_class;
struct si_pm4_state
{
- /* family specific handling */
- enum chip_class chip_class;
/* PKT3_SET_*_REG handling */
unsigned last_opcode;
unsigned last_reg;
unsigned last_pm4;
- /* flush flags for SURFACE_SYNC */
- uint32_t cp_coher_cntl;
-
/* commands for the DE */
unsigned ndw;
uint32_t pm4[SI_PM4_MAX_DW];
@@ -76,15 +71,11 @@ void si_pm4_add_bo(struct si_pm4_state *state,
enum radeon_bo_usage usage,
enum radeon_bo_priority priority);
-void si_pm4_inval_shader_cache(struct si_pm4_state *state);
-void si_pm4_inval_texture_cache(struct si_pm4_state *state);
-
void si_pm4_free_state(struct si_context *sctx,
struct si_pm4_state *state,
unsigned idx);
struct si_pm4_state * si_pm4_alloc_state(struct si_context *sctx);
-uint32_t si_pm4_sync_flags(struct si_context *sctx);
unsigned si_pm4_dirty_dw(struct si_context *sctx);
void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state);
void si_pm4_emit_dirty(struct si_context *sctx);