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authorNicolai Hähnle <[email protected]>2017-05-16 01:51:41 +0200
committerNicolai Hähnle <[email protected]>2017-07-31 14:55:45 +0200
commitdfe237aef9e39c02df92299fb30c44d3534dc524 (patch)
tree04927a081f42c4d3f59274194fa8b236907e000f /src/gallium/drivers/radeonsi/si_pipe.c
parent3b4f481c601102411d421ec3b7ee9b8e50046fc1 (diff)
radeonsi: enable R600_DEBUG=nir for vertex and fragment shaders
Also, disable geometry and tessellation shaders. Mixing and matching NIR and TGSI shaders should work (and I've tested it for the VS/PS interface), but geometry and tessellation requires VS-as-ES/LS, which isn't implemented yet for NIR. Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index d5c21169d27..877c23bcb2d 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -556,6 +556,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return 4;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
+ if (sscreen->b.debug_flags & DBG_NIR)
+ return 140; /* no geometry and tessellation shaders yet */
if (si_have_tgsi_compute(sscreen))
return 450;
return 420;
@@ -753,6 +755,10 @@ static int si_get_shader_param(struct pipe_screen* pscreen,
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
case PIPE_SHADER_CAP_PREFERRED_IR:
+ if (sscreen->b.debug_flags & DBG_NIR &&
+ (shader == PIPE_SHADER_VERTEX ||
+ shader == PIPE_SHADER_FRAGMENT))
+ return PIPE_SHADER_IR_NIR;
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
return 3;