diff options
| author | Marek Olšák <[email protected]> | 2019-01-04 19:39:01 -0500 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-04-04 09:53:24 -0400 |
| commit | 1f21396431a03dc4e5a542628d7d8370973c967f (patch) | |
| tree | 70cdc799793f64a8ee03987e9c93c1b099f30e8c /src/gallium/drivers/radeonsi/si_pipe.c | |
| parent | 2c09eb41221eb704e9e7a21654828173158d1a7d (diff) | |
radeonsi: add support for displayable DCC for multi-RB chips
A compute shader is used to reorder DCC data from aligned to unaligned.
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 98c59867d4b..5caeb575623 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -210,6 +210,8 @@ static void si_destroy_context(struct pipe_context *context) sctx->b.delete_compute_state(&sctx->b, sctx->cs_clear_render_target); if (sctx->cs_clear_render_target_1d_array) sctx->b.delete_compute_state(&sctx->b, sctx->cs_clear_render_target_1d_array); + if (sctx->cs_dcc_retile) + sctx->b.delete_compute_state(&sctx->b, sctx->cs_dcc_retile); if (sctx->blitter) util_blitter_destroy(sctx->blitter); |