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authorMarek Olšák <[email protected]>2019-07-03 22:24:36 -0400
committerMarek Olšák <[email protected]>2019-07-09 17:24:16 -0400
commit2b2093961eeb7b9d70573fde33eb8b87d5a6f35f (patch)
tree28416d854137fb5987dd71a2b3a16cf26b91df80 /src/gallium/drivers/radeonsi/si_pipe.c
parent9f68367d19d9c0394bc935493788dcd189e08f49 (diff)
radeonsi/gfx10: enable primitive binning by default
Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Acked-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 1f924eaefb4..1070903fa32 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1127,11 +1127,13 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
sscreen->info.chip_class >= GFX10;
/* Only enable primitive binning on APUs by default. */
- sscreen->dpbb_allowed = sscreen->info.chip_class >= GFX9 &&
- !sscreen->info.has_dedicated_vram;
-
- sscreen->dfsm_allowed = sscreen->info.chip_class >= GFX9 &&
- !sscreen->info.has_dedicated_vram;
+ if (sscreen->info.chip_class >= GFX10) {
+ sscreen->dpbb_allowed = true;
+ sscreen->dfsm_allowed = !sscreen->info.has_dedicated_vram;
+ } else if (sscreen->info.chip_class == GFX9) {
+ sscreen->dpbb_allowed = !sscreen->info.has_dedicated_vram;
+ sscreen->dfsm_allowed = !sscreen->info.has_dedicated_vram;
+ }
/* Process DPBB enable flags. */
if (sscreen->debug_flags & DBG(DPBB)) {