diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2016-03-25 02:06:50 +0100 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2016-04-02 01:51:13 +0200 |
| commit | 1a5c8c24b5791efa02a7beefa4ba1c49ae033c73 (patch) | |
| tree | c63783871510b1ba41d5a12f187f51a336a6b79a /src/gallium/drivers/radeonsi/si_pipe.c | |
| parent | be5899dcf9a337548d8095a00060d4451b0df222 (diff) | |
gallium: distinguish between shader IR in get_compute_param
For radeonsi, native and TGSI use different compilers and this results
in different limits for different IR's.
The set we strictly need for radeonsi is only the MAX_BLOCK_SIZE
and MAX_THREADS_PER_BLOCK params, but I added a few others as shader
related that seemed like they would also typically depend on the
compiler.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index ed84dc224ff..407b9e19cc4 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -467,7 +467,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: { uint64_t max_const_buffer_size; - pscreen->get_compute_param(pscreen, + pscreen->get_compute_param(pscreen, PIPE_SHADER_IR_TGSI, PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE, &max_const_buffer_size); return max_const_buffer_size; |