diff options
author | Marek Olšák <[email protected]> | 2018-02-03 01:51:53 +0100 |
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committer | Marek Olšák <[email protected]> | 2018-02-24 23:08:28 +0100 |
commit | d2963d8b5f006092bed6b4e6443e5166c0cfdf15 (patch) | |
tree | e6e221fe7a18dbf5e5fb92a6ec9b20233f272f45 /src/gallium/drivers/radeonsi/si_pipe.c | |
parent | 41895c26d325dcc2b4ed464731d1c56afdf3bd6b (diff) |
radeonsi: move tessellation ring info into si_screen
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 38 |
1 files changed, 36 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index ec543f2c0ee..b3cfc83ac5f 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -749,11 +749,45 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws, if (!debug_get_bool_option("RADEON_DISABLE_PERFCOUNTERS", false)) si_init_perfcounters(sscreen); + /* Determine tessellation ring info. */ + bool double_offchip_buffers = sscreen->info.chip_class >= CIK && + sscreen->info.family != CHIP_CARRIZO && + sscreen->info.family != CHIP_STONEY; + /* This must be one less than the maximum number due to a hw limitation. + * Various hardware bugs in SI, CIK, and GFX9 need this. + */ + unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 127 : 63; + unsigned max_offchip_buffers = max_offchip_buffers_per_se * + sscreen->info.max_se; + unsigned offchip_granularity; + /* Hawaii has a bug with offchip buffers > 256 that can be worked * around by setting 4K granularity. */ - sscreen->tess_offchip_block_dw_size = - sscreen->info.family == CHIP_HAWAII ? 4096 : 8192; + if (sscreen->info.family == CHIP_HAWAII) { + sscreen->tess_offchip_block_dw_size = 4096; + offchip_granularity = V_03093C_X_4K_DWORDS; + } else { + sscreen->tess_offchip_block_dw_size = 8192; + offchip_granularity = V_03093C_X_8K_DWORDS; + } + + sscreen->tess_factor_ring_size = 32768 * sscreen->info.max_se; + assert(((sscreen->tess_factor_ring_size / 4) & C_030938_SIZE) == 0); + sscreen->tess_offchip_ring_size = max_offchip_buffers * + sscreen->tess_offchip_block_dw_size * 4; + + if (sscreen->info.chip_class >= CIK) { + if (sscreen->info.chip_class >= VI) + --max_offchip_buffers; + sscreen->vgt_hs_offchip_param = + S_03093C_OFFCHIP_BUFFERING(max_offchip_buffers) | + S_03093C_OFFCHIP_GRANULARITY(offchip_granularity); + } else { + assert(offchip_granularity == V_03093C_X_8K_DWORDS); + sscreen->vgt_hs_offchip_param = + S_0089B0_OFFCHIP_BUFFERING(max_offchip_buffers); + } /* The mere presense of CLEAR_STATE in the IB causes random GPU hangs * on SI. */ |