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authorDave Airlie <[email protected]>2017-11-01 09:40:33 +1000
committerDave Airlie <[email protected]>2017-11-01 10:07:03 +1000
commitd3fdd66401b3c3853162d13b452cd19c03354ede (patch)
treee615a7a25c0fd7cf8004064adfa55c021deb0672 /src/gallium/drivers/radeonsi/si_pipe.c
parent69eee511c631a8372803f175bd6f5a9551230424 (diff)
gallium: add cap for driver specified max combined shader resources.
Some hw (evergreen) has a limit on how many combined (images/buffers/mrts) a fragment shader can access. Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index a6c3aa03d30..875aff655dd 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -589,6 +589,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
case PIPE_CAP_POST_DEPTH_COVERAGE:
case PIPE_CAP_TILE_RASTER_ORDER:
+ case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
return 0;
case PIPE_CAP_NATIVE_FENCE_FD: