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authorNicolai Hähnle <[email protected]>2016-05-04 13:53:45 -0500
committerNicolai Hähnle <[email protected]>2016-05-09 11:52:46 -0500
commitad1782cfb5eaa633582c8a7d026690878ab54064 (patch)
treef897adf12d0765ebd089c7798f47713a7866adb2 /src/gallium/drivers/radeonsi/si_perfcounter.c
parentf096096b777ac64adaa1bd2a65df41cc2497dca3 (diff)
radeonsi: expose performance counters as 64 bit
This is useful for shader-related counters, since they tend to quickly exceed 32 bits. Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_perfcounter.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_perfcounter.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c
index 04da197e70a..96007a523af 100644
--- a/src/gallium/drivers/radeonsi/si_perfcounter.c
+++ b/src/gallium/drivers/radeonsi/si_perfcounter.c
@@ -208,6 +208,7 @@ static struct si_pc_block_base cik_PA_SC = {
.layout = SI_PC_MULTI_ALTERNATE,
};
+/* According to docs, PA_SU counters are only 48 bits wide. */
static struct si_pc_block_base cik_PA_SU = {
.name = "PA_SU",
.num_counters = 4,
@@ -651,24 +652,26 @@ static void si_pc_emit_read(struct r600_common_context *ctx,
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_PERF) |
- COPY_DATA_DST_SEL(COPY_DATA_MEM));
+ COPY_DATA_DST_SEL(COPY_DATA_MEM) |
+ COPY_DATA_COUNT_SEL); /* 64 bits */
radeon_emit(cs, reg >> 2);
radeon_emit(cs, 0); /* unused */
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
- va += 4;
+ va += sizeof(uint64_t);
reg += reg_delta;
}
} else {
for (idx = 0; idx < count; ++idx) {
radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_IMM) |
- COPY_DATA_DST_SEL(COPY_DATA_MEM));
+ COPY_DATA_DST_SEL(COPY_DATA_MEM) |
+ COPY_DATA_COUNT_SEL);
radeon_emit(cs, 0); /* immediate */
- radeon_emit(cs, 0); /* unused */
+ radeon_emit(cs, 0);
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
- va += 4;
+ va += sizeof(uint64_t);
}
}
}