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authorMarek Olšák <[email protected]>2019-01-17 14:27:18 -0500
committerMarek Olšák <[email protected]>2019-01-22 12:14:26 -0500
commite402961e1dc49031c68a1373620abdaa3b9efbe6 (patch)
tree22f934eb4a08fbed8b0e4d79763316f1a3550034 /src/gallium/drivers/radeonsi/si_fence.c
parentc605738113fe91d04f799eae52cec28fafac3f2d (diff)
radeonsi: correct WRITE_DATA.DST_SEL definitions
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_fence.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_fence.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
index b6920c95e34..be394119af6 100644
--- a/src/gallium/drivers/radeonsi/si_fence.c
+++ b/src/gallium/drivers/radeonsi/si_fence.c
@@ -266,7 +266,7 @@ static void si_fine_fence_set(struct si_context *ctx,
if (flags & PIPE_FLUSH_TOP_OF_PIPE) {
struct radeon_cmdbuf *cs = ctx->gfx_cs;
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0));
- radeon_emit(cs, S_370_DST_SEL(V_370_MEM_ASYNC) |
+ radeon_emit(cs, S_370_DST_SEL(V_370_MEM) |
S_370_WR_CONFIRM(1) |
S_370_ENGINE_SEL(V_370_PFP));
radeon_emit(cs, fence_va);