diff options
| author | Marek Olšák <[email protected]> | 2019-09-12 20:20:53 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-10-09 17:12:36 -0400 |
| commit | 095a58204d99d5a2714eeaf7728b377e87432be7 (patch) | |
| tree | 504d0db056c8b9e091faa43e0c17d07888c4f604 /src/gallium/drivers/radeonsi/si_descriptors.c | |
| parent | 98b88cc1f62a6044d25d439dff6fb46c9f5025ae (diff) | |
radeonsi: expand FMASK before MSAA image stores are used
Image stores don't use FMASK, so we have to turn it into identity.
Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_descriptors.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_descriptors.c | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 12ab1f51e97..fa72e5780dc 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -725,21 +725,11 @@ static void si_set_shader_image_desc(struct si_context *ctx, bool uses_dcc = vi_dcc_enabled(tex, level); unsigned access = view->access; - /* Clear the write flag when writes can't occur. - * Note that DCC_DECOMPRESS for MSAA doesn't work in some cases, - * so we don't wanna trigger it. - */ - if (tex->is_depth || - (!fmask_desc && tex->surface.fmask_size != 0)) { - assert(!"Z/S and MSAA image stores are not supported"); - access &= ~PIPE_IMAGE_ACCESS_WRITE; - } - assert(!tex->is_depth); - assert(fmask_desc || tex->surface.fmask_size == 0); + assert(fmask_desc || tex->surface.fmask_offset == 0); if (uses_dcc && !skip_decompress && - (view->access & PIPE_IMAGE_ACCESS_WRITE || + (access & PIPE_IMAGE_ACCESS_WRITE || !vi_dcc_formats_compatible(screen, res->b.b.format, view->format))) { /* If DCC can't be disabled, at least decompress it. * The decompression is relatively cheap if the surface |