summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_debug.c
diff options
context:
space:
mode:
authorNicolai Hähnle <[email protected]>2016-07-14 16:21:52 +0200
committerNicolai Hähnle <[email protected]>2016-07-16 13:02:37 +0200
commit6f73c7595fab450ae9fd1af67aaed322bca02ee0 (patch)
tree10019cb1fa52a6126e1f03d19e1088e3328d4c18 /src/gallium/drivers/radeonsi/si_debug.c
parentb89d0df5351eea1f26c6890dcdff7c0e38424ee1 (diff)
radeonsi: remove the DRAW_PREAMBLE packet
According to firmware guys, the new sequence that we added for Polaris should work on all CIK parts, and should actually be faster on some parts. Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_debug.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_debug.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c
index 57a930f4fe1..73e0bfeb344 100644
--- a/src/gallium/drivers/radeonsi/si_debug.c
+++ b/src/gallium/drivers/radeonsi/si_debug.c
@@ -286,11 +286,6 @@ static uint32_t *si_parse_packet3(FILE *f, uint32_t *ib, int *num_dw,
case PKT3_SET_SH_REG:
si_parse_set_reg_packet(f, ib, count, SI_SH_REG_OFFSET);
break;
- case PKT3_DRAW_PREAMBLE:
- si_dump_reg(f, R_030908_VGT_PRIMITIVE_TYPE, ib[1], ~0);
- si_dump_reg(f, R_028AA8_IA_MULTI_VGT_PARAM, ib[2], ~0);
- si_dump_reg(f, R_028B58_VGT_LS_HS_CONFIG, ib[3], ~0);
- break;
case PKT3_ACQUIRE_MEM:
si_dump_reg(f, R_0301F0_CP_COHER_CNTL, ib[1], ~0);
si_dump_reg(f, R_0301F4_CP_COHER_SIZE, ib[2], ~0);