summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_compute.c
diff options
context:
space:
mode:
authorMarek Olšák <[email protected]>2016-01-19 17:24:57 +0100
committerMarek Olšák <[email protected]>2016-01-22 15:02:40 +0100
commit0d8e4f958f83e0b67f07030c661a30b4e7c19425 (patch)
tree1d468251f8b1e316b114e9782d97589a84f1e436 /src/gallium/drivers/radeonsi/si_compute.c
parent99dfeb01bd5c3e059968e934f3ec88b2fe43e3f4 (diff)
gallium/radeon: rename max_compute_units -> num_good_compute_units
radeon sets this correctly, but not amdgpu Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_compute.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_compute.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 5a08cbfb198..6ef6eeec178 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -61,7 +61,7 @@ static void init_scratch_buffer(struct si_context *sctx, struct si_compute *prog
/* Compute the scratch buffer size using the maximum number of waves.
* This way we don't need to recompute it for each kernel launch. */
- unsigned scratch_waves = 32 * sctx->screen->b.info.max_compute_units;
+ unsigned scratch_waves = 32 * sctx->screen->b.info.num_good_compute_units;
for (i = 0; i < program->shader.binary.global_symbol_count; i++) {
unsigned offset =
program->shader.binary.global_symbol_offsets[i];
@@ -402,7 +402,7 @@ static void si_launch_grid(
num_waves_for_scratch =
MIN2(num_waves_for_scratch,
- 32 * sctx->screen->b.info.max_compute_units);
+ 32 * sctx->screen->b.info.num_good_compute_units);
si_pm4_set_reg(pm4, R_00B860_COMPUTE_TMPRING_SIZE,
/* The maximum value for WAVES is 32 * num CU.
* If you program this value incorrectly, the GPU will hang if