diff options
| author | Marek Olšák <[email protected]> | 2017-06-06 12:13:40 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-06-22 01:51:02 +0200 |
| commit | d7141d8bc0d534a1a79a2285ac6cda3838ca872e (patch) | |
| tree | f2d8986d962c675f19dcab78678a35add7345452 /src/gallium/drivers/radeonsi/si_compute.c | |
| parent | 2638250fecab821c27c95d7bc48a212cd269c708 (diff) | |
radeonsi/gfx9: indirect buffers and all CP packets use TC L2
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_compute.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_compute.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index 79b107e96fc..65f3261e0a1 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -788,8 +788,9 @@ static void si_launch_grid( if (info->indirect) { r600_context_add_resource_size(ctx, info->indirect); - /* The hw doesn't read the indirect buffer via TC L2. */ - if (r600_resource(info->indirect)->TC_L2_dirty) { + /* Indirect buffers use TC L2 on GFX9, but not older hw. */ + if (sctx->b.chip_class <= VI && + r600_resource(info->indirect)->TC_L2_dirty) { sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2; r600_resource(info->indirect)->TC_L2_dirty = false; } |