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authorMarek Olšák <[email protected]>2018-04-08 00:19:50 -0400
committerMarek Olšák <[email protected]>2018-04-27 17:56:04 -0400
commitca33d961a4034ebf4e8e93be32ce3dc9d18570ab (patch)
tree51da2e4cc6b6467333d712c6037d3715071c81be /src/gallium/drivers/radeonsi/si_clear.c
parent174e11c3f5440ad1e22354816fe2ccc5b7a970e9 (diff)
radeonsi: enable fast color clear for level 0 of mipmapped textures on <= VI
GFX9 is more complicated and needs a compute shader that we should just copy from amdvlk. Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_clear.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_clear.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 4e05d9bf5b2..b08a9558b4d 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -369,19 +369,26 @@ static void si_do_fast_color_clear(struct si_context *sctx,
continue;
unsigned level = fb->cbufs[i]->u.tex.level;
+ if (level > 0)
+ continue;
+
tex = (struct r600_texture *)fb->cbufs[i]->texture;
+ /* TODO: GFX9: Implement DCC fast clear for level 0 of
+ * mipmapped textures. Mipmapped DCC has to clear a rectangular
+ * area of DCC for level 0 (because the whole miptree is
+ * organized in a 2D plane).
+ */
+ if (sctx->chip_class >= GFX9 &&
+ tex->resource.b.b.last_level > 0)
+ continue;
+
/* the clear is allowed if all layers are bound */
if (fb->cbufs[i]->u.tex.first_layer != 0 ||
fb->cbufs[i]->u.tex.last_layer != util_max_layer(&tex->resource.b.b, 0)) {
continue;
}
- /* cannot clear mipmapped textures */
- if (fb->cbufs[i]->texture->last_level != 0) {
- continue;
- }
-
/* only supported on tiled surfaces */
if (tex->surface.is_linear) {
continue;