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authorMarek Olšák <[email protected]>2018-04-01 18:28:20 -0400
committerMarek Olšák <[email protected]>2018-04-05 15:34:58 -0400
commit076afb4f0e71ece84b875466da920aa62415151a (patch)
treeacf98e1777835d496c670b1e71d200d9fca4c674 /src/gallium/drivers/radeonsi/si_clear.c
parent5f1cddde78aa93ea1272c50a93e479cb76144af7 (diff)
radeonsi: rename a few R600/r600_ -> SI_/si_
Acked-by: Timothy Arceri <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_clear.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_clear.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index 9ae2a07343a..d2529971861 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -231,7 +231,7 @@ void vi_dcc_clear_level(struct si_context *sctx,
}
si_clear_buffer(sctx, dcc_buffer, dcc_offset, clear_size,
- clear_value, R600_COHERENCY_CB_META);
+ clear_value, SI_COHERENCY_CB_META);
}
/* Set the same micro tile mode as the destination of the last MSAA resolve.
@@ -461,7 +461,7 @@ static void si_do_fast_color_clear(struct si_context *sctx,
si_clear_buffer(sctx, &tex->cmask_buffer->b.b,
tex->cmask.offset, tex->cmask.size,
- 0xCCCCCCCC, R600_COHERENCY_CB_META);
+ 0xCCCCCCCC, SI_COHERENCY_CB_META);
need_decompress_pass = true;
}
@@ -493,7 +493,7 @@ static void si_do_fast_color_clear(struct si_context *sctx,
/* Do the fast clear. */
si_clear_buffer(sctx, &tex->cmask_buffer->b.b,
tex->cmask.offset, tex->cmask.size, 0,
- R600_COHERENCY_CB_META);
+ SI_COHERENCY_CB_META);
need_decompress_pass = true;
}