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authorMarek Olšák <[email protected]>2018-05-23 22:42:49 -0400
committerMarek Olšák <[email protected]>2018-07-31 18:28:41 -0400
commit20dd75a9268a1adf0a8b47267ba2c5acc55cb207 (patch)
tree20aa9d150a6b6c3bd64405e88ef5ec115036f627 /src/gallium/drivers/radeonsi/si_clear.c
parent966f155623e5a626f1d788af7e0f602cdcee6993 (diff)
radeonsi: use storage_samples instead of color_samples in most places
and use pipe_resource::nr_storage_samples instead of r600_texture::num_color_samples. Tested-by: Dieter Nützel <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_clear.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_clear.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index e614ab52423..4e07de81bac 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -237,7 +237,7 @@ void vi_dcc_clear_level(struct si_context *sctx,
assert(tex->buffer.b.b.last_level == 0);
/* 4x and 8x MSAA needs a sophisticated compute shader for
* the clear. See AMDVLK. */
- assert(tex->num_color_samples <= 2);
+ assert(tex->buffer.b.b.nr_storage_samples <= 2);
clear_size = tex->surface.dcc_size;
} else {
unsigned num_layers = util_num_layers(&tex->buffer.b.b, level);
@@ -248,7 +248,7 @@ void vi_dcc_clear_level(struct si_context *sctx,
* dcc_fast_clear_size bytes for each layer. A compute shader
* would be more efficient than separate per-layer clear operations.
*/
- assert(tex->num_color_samples <= 2 || num_layers == 1);
+ assert(tex->buffer.b.b.nr_storage_samples <= 2 || num_layers == 1);
dcc_offset += tex->surface.u.legacy.level[level].dcc_offset;
clear_size = tex->surface.u.legacy.level[level].dcc_fast_clear_size *