diff options
| author | Marek Olšák <[email protected]> | 2018-04-30 23:55:31 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-05-10 18:34:32 -0400 |
| commit | 9d00580e75f1d223e2dfa312da062fbb252b71a6 (patch) | |
| tree | 7e68eb422d30b426e348440165c4f8e6e933744f /src/gallium/drivers/radeonsi/si_clear.c | |
| parent | 912b0163dc5d6929d8a9ae4c6d475807e764832a (diff) | |
radeonsi: support creating EQAA color textures
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_clear.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_clear.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c index 0f3546b02da..23977186611 100644 --- a/src/gallium/drivers/radeonsi/si_clear.c +++ b/src/gallium/drivers/radeonsi/si_clear.c @@ -247,7 +247,7 @@ void vi_dcc_clear_level(struct si_context *sctx, assert(rtex->buffer.b.b.last_level == 0); /* 4x and 8x MSAA needs a sophisticated compute shader for * the clear. See AMDVLK. */ - assert(rtex->buffer.b.b.nr_samples <= 2); + assert(rtex->num_color_samples <= 2); clear_size = rtex->surface.dcc_size; } else { unsigned num_layers = util_num_layers(&rtex->buffer.b.b, level); @@ -258,7 +258,7 @@ void vi_dcc_clear_level(struct si_context *sctx, * dcc_fast_clear_size bytes for each layer. A compute shader * would be more efficient than separate per-layer clear operations. */ - assert(rtex->buffer.b.b.nr_samples <= 2 || num_layers == 1); + assert(rtex->num_color_samples <= 2 || num_layers == 1); dcc_offset += rtex->surface.u.legacy.level[level].dcc_offset; clear_size = rtex->surface.u.legacy.level[level].dcc_fast_clear_size * |