diff options
| author | Nicolai Hähnle <[email protected]> | 2018-07-02 18:50:48 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-07-03 15:51:13 -0400 |
| commit | 1666ee183e2dd0ae78cbec236315ad6328692589 (patch) | |
| tree | 2390a9a50a316c490de7d56448c62a75088174b3 /src/gallium/drivers/radeonsi/si_clear.c | |
| parent | 69c41fb8ff97bf31196a834e3e4086ae8247a9ff (diff) | |
radeonsi/gfx10: implement hardware MSAA resolve
MSAA is only supported for 64KB_{R,Z}_X modes, so the micro tile
optimization that we use on gfx9 and earlier does not work.
Be very explicit about how the swizzle mode of the temporary surface is
selected.
Acked-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_clear.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_clear.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c index 60daff383cb..fa8ae5d2566 100644 --- a/src/gallium/drivers/radeonsi/si_clear.c +++ b/src/gallium/drivers/radeonsi/si_clear.c @@ -277,7 +277,8 @@ void vi_dcc_clear_level(struct si_context *sctx, static void si_set_optimal_micro_tile_mode(struct si_screen *sscreen, struct si_texture *tex) { - if (tex->buffer.b.is_shared || + if (sscreen->info.chip_class >= GFX10 || + tex->buffer.b.is_shared || tex->buffer.b.b.nr_samples <= 1 || tex->surface.micro_tile_mode == tex->last_msaa_resolve_target_micro_mode) return; |