summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeonsi/si_clear.c
diff options
context:
space:
mode:
authorMarek Olšák <[email protected]>2019-05-14 22:16:20 -0400
committerMarek Olšák <[email protected]>2019-05-15 20:54:10 -0400
commitccfcb9d818b40564001b3cf2516367526de26c1d (patch)
tree635e075d82a6793001a8982866684e36be61d4d8 /src/gallium/drivers/radeonsi/si_clear.c
parente5cc363f43ba3e4b0800dc1e4fae1395f65a1275 (diff)
ac: rename SI-CIK-VI to GFX6-GFX7-GFX8
Acked-by: Dave Airlie <[email protected]> We already use GFX9 and I don't want us to have confusing naming in the driver. GFXn naming is better from the driver perspective, because it's the real version of the gfx portion of the hw. Also, CIK means Bonaire-Kaveri-Kabini, it doesn't mean CI. It shouldn't confuse our SDMA, UVD, VCE etc. code much. Those have nothing to do with GFXn and they have their own version numbers.
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_clear.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_clear.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_clear.c b/src/gallium/drivers/radeonsi/si_clear.c
index d294f236914..d0094031a95 100644
--- a/src/gallium/drivers/radeonsi/si_clear.c
+++ b/src/gallium/drivers/radeonsi/si_clear.c
@@ -313,7 +313,7 @@ static void si_set_optimal_micro_tile_mode(struct si_screen *sscreen,
assert(!"unexpected micro mode");
return;
}
- } else if (sscreen->info.chip_class >= CIK) {
+ } else if (sscreen->info.chip_class >= GFX7) {
/* These magic numbers were copied from addrlib. It doesn't use
* any definitions for them either. They are all 2D_TILED_THIN1
* modes with different bpp and micro tile mode.
@@ -332,7 +332,7 @@ static void si_set_optimal_micro_tile_mode(struct si_screen *sscreen,
assert(!"unexpected micro mode");
return;
}
- } else { /* SI */
+ } else { /* GFX6 */
switch (tex->last_msaa_resolve_target_micro_mode) {
case RADEON_MICRO_MODE_DISPLAY:
switch (tex->surface.bpe) {
@@ -434,7 +434,7 @@ static void si_do_fast_color_clear(struct si_context *sctx,
!(tex->buffer.external_usage & PIPE_HANDLE_USAGE_EXPLICIT_FLUSH))
continue;
- if (sctx->chip_class <= VI &&
+ if (sctx->chip_class <= GFX8 &&
tex->surface.u.legacy.level[0].mode == RADEON_SURF_MODE_1D &&
!sctx->screen->info.htile_cmask_support_1d_tiling)
continue;
@@ -474,7 +474,7 @@ static void si_do_fast_color_clear(struct si_context *sctx,
continue;
/* This can happen with mipmapping or MSAA. */
- if (sctx->chip_class == VI &&
+ if (sctx->chip_class == GFX8 &&
!tex->surface.u.legacy.level[level].dcc_fast_clear_size)
continue;