diff options
| author | Marek Olšák <[email protected]> | 2017-03-24 02:58:54 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-03-30 16:09:37 +0200 |
| commit | a955ee788f2757c346fef5950cae8eefd311880f (patch) | |
| tree | da53380b645bcd3610717e32feac2717512de028 /src/gallium/drivers/radeonsi/si_blit.c | |
| parent | f7bd51626eae4bf3ac3cc42a0ed5d31c0e660f6e (diff) | |
gallium/radeon: add and use a new helper vi_dcc_enabled
Reviewed-by: Nicolai Hähnle <[email protected]>
Tested-by: Edmondo Tommasina <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_blit.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_blit.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index cdc9cafa280..a94804d6c25 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -427,8 +427,7 @@ static void si_blit_decompress_color(struct pipe_context *ctx, /* disable levels without DCC */ for (int i = first_level; i <= last_level; i++) { - if (!rtex->dcc_offset || - i >= rtex->surface.num_dcc_levels) + if (!vi_dcc_enabled(rtex, i)) level_mask &= ~(1 << i); } } else if (rtex->fmask.size) { @@ -1039,8 +1038,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx, * it's being overwritten anyway, clear it to uncompressed. * This is still the fastest codepath even with this clear. */ - if (dst->dcc_offset && - info->dst.level < dst->surface.num_dcc_levels) { + if (vi_dcc_enabled(dst, info->dst.level)) { /* TODO: Implement per-level DCC clears for GFX9. */ if (sctx->b.chip_class >= GFX9 && info->dst.resource->last_level != 0) |