diff options
| author | Marek Olšák <[email protected]> | 2016-06-06 02:01:36 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2016-06-08 00:22:45 +0200 |
| commit | 7c6e88b6430b3a805f982c7f8b34d1f79a8fc09c (patch) | |
| tree | 28a39768ae291cf977bda60943201ce2f55113e3 /src/gallium/drivers/radeonsi/si_blit.c | |
| parent | 9a472a3e0b20923e9a42d362c6fad546c591f3d1 (diff) | |
radeonsi: allow MSAA resolving into a texture that has DCC enabled
Since DCC is enabled almost everywhere now, it's important not to disable
this fast path.
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_blit.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_blit.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index c28533e2c74..23ae382ff23 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -902,8 +902,19 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx, info->src.box.height == dst_height && info->src.box.depth == 1 && dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D && - (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */ - !dst->dcc_offset) { + (!dst->cmask.size || !dst->dirty_level_mask)) { /* dst cannot be fast-cleared */ + /* Resolving into a surface with DCC is unsupported. Since + * it's being overwritten anyway, clear it to uncompressed. + * This is still the fastest codepath even with this clear. + */ + if (dst->dcc_offset && + dst->surface.level[info->dst.level].dcc_enabled) { + vi_dcc_clear_level(&sctx->b, dst, info->dst.level, + 0xFFFFFFFF); + dst->dirty_level_mask &= ~(1 << info->dst.level); + } + + /* Resolve directly from src to dst. */ si_blitter_begin(ctx, SI_COLOR_RESOLVE | (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND)); util_blitter_custom_resolve_color(sctx->blitter, |