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| author | Marek Olšák <[email protected]> | 2017-06-03 13:59:03 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-06-07 20:17:09 +0200 |
| commit | 257b538fd2e48666d5daf7bc5394c8d0a977fedf (patch) | |
| tree | ba0e1a434ba0a839dc87de19bde2f69c4292ad52 /src/gallium/drivers/radeonsi/si_blit.c | |
| parent | e9409c86e7b076801626474dfa5a9151da078a73 (diff) | |
radeonsi: do EarlyCSEMemSSA LLVM pass
so that LLVM IR looks like CSE has been run on it. It's also recommended
by the instruction combining pass.
This also fixes:
- GL45-CTS.arrays_of_arrays_gl.InteractionFunctionCalls2 (crash)
- piglit/spec/arb_shader_ballot/execution/fs-readFirstInvocation-uint-loop (fail)
The code size decrease is positive, the register usage isn't. There is
a decrease in VGPR spilling for Tomb Raider, but increase in DiRT Showdown
and GRID Autosport.
EarlyCSEMemSSA has a -0.01% change in code size compared EarlyCSE.
SGPRS: 1935420 -> 1938076 (0.14 %)
VGPRS: 1645504 -> 1645988 (0.03 %)
Spilled SGPRs: 2493 -> 2651 (6.34 %)
Spilled VGPRs: 107 -> 115 (7.48 %)
Private memory VGPRs: 1332 -> 1332 (0.00 %)
Scratch size: 1512 -> 1516 (0.26 %) dwords per thread
Code Size: 61981592 -> 61890012 (-0.15 %) bytes
Max Waves: 371847 -> 371798 (-0.01 %)
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_blit.c')
0 files changed, 0 insertions, 0 deletions