radeonsi: move shaders to new handling

Signed-off-by: Christian König <[email protected]>

1 files changed, 0 insertions, 214 deletions

diff --git a/src/gallium/drivers/radeonsi/evergreen_state.c b/src/gallium/drivers/radeonsi/evergreen_state.c
index b04c1cb9ecf..bb027eee448 100644
--- a/src/gallium/drivers/radeonsi/evergreen_state.c
+++ b/src/gallium/drivers/radeonsi/evergreen_state.c
@@ -1054,20 +1054,14 @@ static void evergreen_set_sample_mask(struct pipe_context *pipe, unsigned sample
 void cayman_init_state_functions(struct r600_context *rctx)
 {
 	si_init_state_functions(rctx);
-	rctx->context.create_fs_state = si_create_shader_state;
 	rctx->context.create_sampler_state = si_create_sampler_state;
 	rctx->context.create_sampler_view = evergreen_create_sampler_view;
 	rctx->context.create_vertex_elements_state = si_create_vertex_elements;
-	rctx->context.create_vs_state = si_create_shader_state;
 	rctx->context.bind_fragment_sampler_states = evergreen_bind_ps_sampler;
-	rctx->context.bind_fs_state = r600_bind_ps_shader;
 	rctx->context.bind_vertex_elements_state = r600_bind_vertex_elements;
 	rctx->context.bind_vertex_sampler_states = evergreen_bind_vs_sampler;
-	rctx->context.bind_vs_state = r600_bind_vs_shader;
-	rctx->context.delete_fs_state = r600_delete_ps_shader;
 	rctx->context.delete_sampler_state = si_delete_sampler_state;
 	rctx->context.delete_vertex_elements_state = r600_delete_vertex_element;
-	rctx->context.delete_vs_state = r600_delete_vs_shader;
 	rctx->context.set_constant_buffer = r600_set_constant_buffer;
 	rctx->context.set_fragment_sampler_views = evergreen_set_ps_sampler_view;
 	rctx->context.set_polygon_stipple = evergreen_set_polygon_stipple;
@@ -1081,211 +1075,3 @@ void cayman_init_state_functions(struct r600_context *rctx)
 	rctx->context.stream_output_target_destroy = r600_so_target_destroy;
 	rctx->context.set_stream_output_targets = r600_set_so_targets;
 }
-
-void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *shader)
-{
-	struct r600_context *rctx = (struct r600_context *)ctx;
-	struct r600_pipe_state *rstate = &shader->rstate;
-	struct r600_shader *rshader = &shader->shader;
-	unsigned i, exports_ps, num_cout, spi_ps_in_control, db_shader_control;
-	unsigned num_sgprs, num_user_sgprs;
-	int pos_index = -1, face_index = -1;
-	int ninterp = 0;
-	boolean have_linear = FALSE, have_centroid = FALSE, have_perspective = FALSE;
-	unsigned spi_baryc_cntl;
-	uint64_t va;
-
-	if (si_pipe_shader_create(ctx, shader))
-		return;
-
-	rstate->nregs = 0;
-
-	db_shader_control = S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
-	for (i = 0; i < rshader->ninput; i++) {
-		ninterp++;
-		/* XXX: Flat shading hangs the GPU */
-		if (rshader->input[i].interpolate == TGSI_INTERPOLATE_CONSTANT ||
-		    (rshader->input[i].interpolate == TGSI_INTERPOLATE_COLOR &&
-		     rctx->queued.named.rasterizer->flatshade))
-			have_linear = TRUE;
-		if (rshader->input[i].interpolate == TGSI_INTERPOLATE_LINEAR)
-			have_linear = TRUE;
-		if (rshader->input[i].interpolate == TGSI_INTERPOLATE_PERSPECTIVE)
-			have_perspective = TRUE;
-		if (rshader->input[i].centroid)
-			have_centroid = TRUE;
-	}
-
-	for (i = 0; i < rshader->noutput; i++) {
-		if (rshader->output[i].name == TGSI_SEMANTIC_POSITION)
-			db_shader_control |= S_02880C_Z_EXPORT_ENABLE(1);
-		if (rshader->output[i].name == TGSI_SEMANTIC_STENCIL)
-			db_shader_control |= 0; // XXX OP_VAL or TEST_VAL?
-	}
-	if (rshader->uses_kill)
-		db_shader_control |= S_02880C_KILL_ENABLE(1);
-
-	exports_ps = 0;
-	num_cout = 0;
-	for (i = 0; i < rshader->noutput; i++) {
-		if (rshader->output[i].name == TGSI_SEMANTIC_POSITION ||
-		    rshader->output[i].name == TGSI_SEMANTIC_STENCIL)
-			exports_ps |= 1;
-		else if (rshader->output[i].name == TGSI_SEMANTIC_COLOR) {
-			if (rshader->fs_write_all)
-				num_cout = rshader->nr_cbufs;
-			else
-				num_cout++;
-		}
-	}
-	if (!exports_ps) {
-		/* always at least export 1 component per pixel */
-		exports_ps = 2;
-	}
-
-	spi_ps_in_control = S_0286D8_NUM_INTERP(ninterp);
-
-	spi_baryc_cntl = 0;
-	if (have_perspective)
-		spi_baryc_cntl |= have_centroid ?
-			S_0286E0_PERSP_CENTROID_CNTL(1) : S_0286E0_PERSP_CENTER_CNTL(1);
-	if (have_linear)
-		spi_baryc_cntl |= have_centroid ?
-			S_0286E0_LINEAR_CENTROID_CNTL(1) : S_0286E0_LINEAR_CENTER_CNTL(1);
-
-	r600_pipe_state_add_reg(rstate,
-				R_0286E0_SPI_BARYC_CNTL,
-				spi_baryc_cntl,
-				NULL, 0);
-
-	r600_pipe_state_add_reg(rstate,
-				R_0286CC_SPI_PS_INPUT_ENA,
-				shader->spi_ps_input_ena,
-				NULL, 0);
-
-	r600_pipe_state_add_reg(rstate,
-				R_0286D0_SPI_PS_INPUT_ADDR,
-				shader->spi_ps_input_ena,
-				NULL, 0);
-
-	r600_pipe_state_add_reg(rstate,
-				R_0286D8_SPI_PS_IN_CONTROL,
-				spi_ps_in_control,
-				NULL, 0);
-
-	/* XXX: Depends on Z buffer format? */
-	r600_pipe_state_add_reg(rstate,
-				R_028710_SPI_SHADER_Z_FORMAT,
-				0,
-				NULL, 0);
-
-	/* XXX: Depends on color buffer format? */
-	r600_pipe_state_add_reg(rstate,
-				R_028714_SPI_SHADER_COL_FORMAT,
-				S_028714_COL0_EXPORT_FORMAT(V_028714_SPI_SHADER_32_ABGR),
-				NULL, 0);
-
-	va = r600_resource_va(ctx->screen, (void *)shader->bo);
-	r600_pipe_state_add_reg(rstate,
-				R_00B020_SPI_SHADER_PGM_LO_PS,
-				va >> 8,
-				shader->bo, RADEON_USAGE_READ);
-	r600_pipe_state_add_reg(rstate,
-				R_00B024_SPI_SHADER_PGM_HI_PS,
-				va >> 40,
-				shader->bo, RADEON_USAGE_READ);
-
-	num_user_sgprs = 6;
-	num_sgprs = shader->num_sgprs;
-	if (num_user_sgprs > num_sgprs)
-		num_sgprs = num_user_sgprs;
-	/* Last 2 reserved SGPRs are used for VCC */
-	num_sgprs += 2;
-	assert(num_sgprs <= 104);
-
-	r600_pipe_state_add_reg(rstate,
-				R_00B028_SPI_SHADER_PGM_RSRC1_PS,
-				S_00B028_VGPRS((shader->num_vgprs - 1) / 4) |
-				S_00B028_SGPRS((num_sgprs - 1) / 8),
-				NULL, 0);
-	r600_pipe_state_add_reg(rstate,
-				R_00B02C_SPI_SHADER_PGM_RSRC2_PS,
-				S_00B02C_USER_SGPR(num_user_sgprs),
-				NULL, 0);
-
-	r600_pipe_state_add_reg(rstate, R_02880C_DB_SHADER_CONTROL,
-				db_shader_control,
-				NULL, 0);
-
-	shader->sprite_coord_enable = rctx->sprite_coord_enable;
-}
-
-void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *shader)
-{
-	struct r600_context *rctx = (struct r600_context *)ctx;
-	struct r600_pipe_state *rstate = &shader->rstate;
-	struct r600_shader *rshader = &shader->shader;
-	unsigned num_sgprs, num_user_sgprs;
-	unsigned nparams, i;
-	uint64_t va;
-
-	if (si_pipe_shader_create(ctx, shader))
-		return;
-
-	/* clear previous register */
-	rstate->nregs = 0;
-
-	/* Certain attributes (position, psize, etc.) don't count as params.
-	 * VS is required to export at least one param and r600_shader_from_tgsi()
-	 * takes care of adding a dummy export.
-	 */
-	for (nparams = 0, i = 0 ; i < rshader->noutput; i++) {
-		if (rshader->output[i].name != TGSI_SEMANTIC_POSITION)
-			nparams++;
-	}
-	if (nparams < 1)
-		nparams = 1;
-
-	r600_pipe_state_add_reg(rstate,
-			R_0286C4_SPI_VS_OUT_CONFIG,
-			S_0286C4_VS_EXPORT_COUNT(nparams - 1),
-			NULL, 0);
-
-	r600_pipe_state_add_reg(rstate,
-				R_02870C_SPI_SHADER_POS_FORMAT,
-				S_02870C_POS0_EXPORT_FORMAT(V_02870C_SPI_SHADER_4COMP) |
-				S_02870C_POS1_EXPORT_FORMAT(V_02870C_SPI_SHADER_NONE) |
-				S_02870C_POS2_EXPORT_FORMAT(V_02870C_SPI_SHADER_NONE) |
-				S_02870C_POS3_EXPORT_FORMAT(V_02870C_SPI_SHADER_NONE),
-				NULL, 0);
-
-	va = r600_resource_va(ctx->screen, (void *)shader->bo);
-	r600_pipe_state_add_reg(rstate,
-				R_00B120_SPI_SHADER_PGM_LO_VS,
-				va >> 8,
-				shader->bo, RADEON_USAGE_READ);
-	r600_pipe_state_add_reg(rstate,
-				R_00B124_SPI_SHADER_PGM_HI_VS,
-				va >> 40,
-				shader->bo, RADEON_USAGE_READ);
-
-	num_user_sgprs = 8;
-	num_sgprs = shader->num_sgprs;
-	if (num_user_sgprs > num_sgprs)
-		num_sgprs = num_user_sgprs;
-	/* Last 2 reserved SGPRs are used for VCC */
-	num_sgprs += 2;
-	assert(num_sgprs <= 104);
-
-	r600_pipe_state_add_reg(rstate,
-				R_00B128_SPI_SHADER_PGM_RSRC1_VS,
-				S_00B128_VGPRS((shader->num_vgprs - 1) / 4) |
-				S_00B128_SGPRS((num_sgprs - 1) / 8),
-				NULL, 0);
-	r600_pipe_state_add_reg(rstate,
-				R_00B12C_SPI_SHADER_PGM_RSRC2_VS,
-				S_00B12C_USER_SGPR(num_user_sgprs),
-				NULL, 0);
-}
-
-