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authorTom Stellard <[email protected]>2012-09-06 15:41:59 -0400
committerTom Stellard <[email protected]>2012-09-11 14:53:47 -0400
commitd3e58f75d257eefd18e1830573487830a40caf12 (patch)
tree131f4d27bf7699ef39f4fa9a8214fcac0f577781 /src/gallium/drivers/radeon
parent5fff032dd513c74e4fdd2ac04197f09531720c77 (diff)
radeonsi: Move interpolation mode check into the compiler
The compiler needs to know which interpolation modes are enabled, so it knows which values will be preloaded into the VGPRs. Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/SIAssignInterpRegs.cpp13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp b/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp
index 447eff6f5ac..0e36e6b8b78 100644
--- a/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp
+++ b/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp
@@ -52,6 +52,7 @@ public:
char SIAssignInterpRegsPass::ID = 0;
#define INTERP_VALUES 16
+#define REQUIRED_VALUE_MAX_INDEX 7
struct interp_info {
bool enabled;
@@ -92,16 +93,26 @@ bool SIAssignInterpRegsPass::runOnMachineFunction(MachineFunction &MF)
return false;
}
MachineRegisterInfo &MRI = MF.getRegInfo();
+ bool ForceEnable = true;
/* First pass, mark the interpolation values that are used. */
for (unsigned interp_idx = 0; interp_idx < INTERP_VALUES; interp_idx++) {
for (unsigned reg_idx = 0; reg_idx < InterpUse[interp_idx].reg_count;
reg_idx++) {
- InterpUse[interp_idx].enabled =
+ InterpUse[interp_idx].enabled = InterpUse[interp_idx].enabled ||
!MRI.use_empty(InterpUse[interp_idx].regs[reg_idx]);
+ if (InterpUse[interp_idx].enabled &&
+ interp_idx <= REQUIRED_VALUE_MAX_INDEX) {
+ ForceEnable = false;
+ }
}
}
+ // At least one interpolation mode must be enabled or else the GPU will hang.
+ if (ForceEnable) {
+ InterpUse[0].enabled = true;
+ }
+
unsigned used_vgprs = 0;
/* Second pass, replace with VGPRs. */