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authorLeo Liu <[email protected]>2017-08-18 12:03:19 -0400
committerLeo Liu <[email protected]>2017-08-21 10:09:09 -0400
commit2b1eacabfab56fedd084818b0ae7011875a1a20b (patch)
treece1ed945ed1d0a629a1c20ebf3478d6485944795 /src/gallium/drivers/radeon
parent2843c5d15cf7c051d6aaf0744c3c1c7d4a734184 (diff)
radeon/uvd: get the target buffer pitch correct for different format
Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/radeon_uvd.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index d5352d9de6f..dd8c0e0eb0d 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1397,7 +1397,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
switch (type) {
default:
case RUVD_SURFACE_TYPE_LEGACY:
- msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x;
+ msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w;
switch (luma->u.legacy.level[0].mode) {
case RADEON_SURF_MODE_LINEAR_ALIGNED:
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
@@ -1435,7 +1435,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
msg->body.decode.dt_surf_tile_config |= RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->u.legacy.mtilea));
break;
case RUVD_SURFACE_TYPE_GFX9:
- msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->bpe;
+ msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->blk_w;
/* SWIZZLE LINEAR MODE */
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;