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authorLeo Liu <[email protected]>2015-04-15 12:36:32 -0400
committerMarek Olšák <[email protected]>2015-08-14 15:02:30 +0200
commit1550790b3fab901c697e9d8e5b01ea67d8843e99 (patch)
treef4a7e994620bb5f82d4b7568f48dc217ed50fb8b /src/gallium/drivers/radeon
parent22f71dbf7976d1803940bc2a0429c3d302dae9fa (diff)
radeon/vce: implement VCE two pipe support
v2: rebase by Marek Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/radeon_vce.c5
-rw-r--r--src/gallium/drivers/radeon/radeon_vce.h4
-rw-r--r--src/gallium/drivers/radeon/radeon_vce_40_2_2.c17
3 files changed, 26 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index c7b8952403a..02991b2afd7 100644
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -400,6 +400,8 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
enc->use_vm = true;
if ((rscreen->info.drm_major > 2) || (rscreen->info.drm_minor >= 42))
enc->use_vui = true;
+ if (rscreen->info.family >= CHIP_TONGA)
+ enc->use_2p = true;
enc->base = *templ;
enc->base.context = context;
@@ -439,6 +441,9 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
cpb_size = cpb_size * align(tmp_surf->npix_y, 16);
cpb_size = cpb_size * 3 / 2;
cpb_size = cpb_size * enc->cpb_num;
+ if (enc->use_2p)
+ cpb_size += RVCE_MAX_AUX_BUFFER_NUM *
+ RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
tmp_buf->destroy(tmp_buf);
if (!rvid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) {
RVID_ERR("Can't create CPB buffer.\n");
diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h
index 66c547855b1..a8448108a55 100644
--- a/src/gallium/drivers/radeon/radeon_vce.h
+++ b/src/gallium/drivers/radeon/radeon_vce.h
@@ -43,6 +43,9 @@
#define RVCE_READWRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READWRITE, (domain), (off))
#define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; }
+#define RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE (4096 * 16 * 2.5)
+#define RVCE_MAX_AUX_BUFFER_NUM 4
+
struct r600_common_screen;
/* driver dependent callback */
@@ -101,6 +104,7 @@ struct rvce_encoder {
struct pipe_h264_enc_picture_desc pic;
bool use_vm;
bool use_vui;
+ bool use_2p;
};
/* CPB handling functions */
diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
index 71b5e89fd59..904781525b5 100644
--- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
+++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
@@ -287,6 +287,23 @@ static void encode(struct rvce_encoder *enc)
RVCE_CS(enc->bs_size); // videoBitstreamRingSize
RVCE_END();
+ if (enc->use_2p) {
+ unsigned aux_offset = enc->cpb.res->buf->size -
+ RVCE_MAX_AUX_BUFFER_NUM * RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
+ RVCE_BEGIN(0x05000002); // auxiliary buffer
+ for (i = 0; i < 4; ++i) {
+ RVCE_CS(aux_offset);
+ aux_offset += RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
+ }
+ for (i = 0; i < 4; ++i)
+ RVCE_CS(0x00000000);
+ for (i = 0; i < 4; ++i)
+ RVCE_CS(RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE);
+ for (i = 0; i < 4; ++i)
+ RVCE_CS(0x00000000);
+ RVCE_END();
+ }
+
RVCE_BEGIN(0x03000001); // encode
RVCE_CS(0x00000000); // insertHeaders
RVCE_CS(0x00000000); // pictureStructure