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authorMarek Olšák <[email protected]>2017-03-14 23:26:30 +0100
committerMarek Olšák <[email protected]>2017-03-30 14:44:33 +0200
commit474468fbf935fcd26704061054ccb4d1629009ed (patch)
treee7d1e7d4acc96e1fce1b4ce097e567c6230fec51 /src/gallium/drivers/radeon
parent8ea3da07061d76f5bca089dbd7c39932b94b5f61 (diff)
radeonsi/gfx9: disable features that don't work
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index c6d2381b122..dbcfd58a4bc 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1625,7 +1625,9 @@ static void *r600_texture_transfer_map(struct pipe_context *ctx,
* Use the staging texture for uploads if the underlying BO
* is busy.
*/
- if (!rtex->surface.is_linear)
+ /* TODO: Linear CPU mipmap addressing is broken on GFX9: */
+ if (!rtex->surface.is_linear ||
+ (rctx->chip_class == GFX9 && level))
use_staging_texture = true;
else if (usage & PIPE_TRANSFER_READ)
use_staging_texture =
@@ -2632,6 +2634,10 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
if (rctx->render_cond)
return;
+ /* TODO: fix CMASK and DCC fast clear */
+ if (rctx->chip_class >= GFX9)
+ return;
+
for (i = 0; i < fb->nr_cbufs; i++) {
struct r600_texture *tex;
unsigned clear_bit = PIPE_CLEAR_COLOR0 << i;