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authorMarek Olšák <[email protected]>2017-02-15 18:22:27 +0100
committerMarek Olšák <[email protected]>2017-02-18 01:22:08 +0100
commit6b73aafceb1eb8e81754e2f349826994de678466 (patch)
tree8867b645888363ea28c3e1f87ac270ead32403ca /src/gallium/drivers/radeon
parent620aded541a5b81df74575888754094fea2f2ae2 (diff)
radeonsi: use a clever alignment for constant buffer uploads
This results in a very tiny decrease in lgkm wait cycles. Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 432550dbef4..812c0362afc 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -201,6 +201,7 @@ struct radeon_info {
uint32_t ce_fw_version;
uint32_t vce_harvest_config;
uint32_t clock_crystal_freq;
+ uint32_t tcc_cache_line_size;
/* Kernel info. */
uint32_t drm_major; /* version */