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authorMarek Olšák <[email protected]>2016-04-16 14:41:57 +0200
committerMarek Olšák <[email protected]>2016-04-22 01:30:39 +0200
commitaf249a7da9bf2621ab836d5074ef692677b11bbf (patch)
tree5e006ea5552461b793fe85b9c3c91f86fa716c45 /src/gallium/drivers/radeon
parentfb523cb6ad3ffef22ab4b9cce9e53859c17c5739 (diff)
gallium: use PIPE_SHADER_* everywhere, remove TGSI_PROCESSOR_*
Acked-by: Jose Fonseca <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.c12
-rw-r--r--src/gallium/drivers/radeon/radeon_llvm_emit.c12
2 files changed, 12 insertions, 12 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 9ed6da6a82b..929fecb9284 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -965,17 +965,17 @@ bool r600_can_dump_shader(struct r600_common_screen *rscreen,
unsigned processor)
{
switch (processor) {
- case TGSI_PROCESSOR_VERTEX:
+ case PIPE_SHADER_VERTEX:
return (rscreen->debug_flags & DBG_VS) != 0;
- case TGSI_PROCESSOR_TESS_CTRL:
+ case PIPE_SHADER_TESS_CTRL:
return (rscreen->debug_flags & DBG_TCS) != 0;
- case TGSI_PROCESSOR_TESS_EVAL:
+ case PIPE_SHADER_TESS_EVAL:
return (rscreen->debug_flags & DBG_TES) != 0;
- case TGSI_PROCESSOR_GEOMETRY:
+ case PIPE_SHADER_GEOMETRY:
return (rscreen->debug_flags & DBG_GS) != 0;
- case TGSI_PROCESSOR_FRAGMENT:
+ case PIPE_SHADER_FRAGMENT:
return (rscreen->debug_flags & DBG_PS) != 0;
- case TGSI_PROCESSOR_COMPUTE:
+ case PIPE_SHADER_COMPUTE:
return (rscreen->debug_flags & DBG_CS) != 0;
default:
return false;
diff --git a/src/gallium/drivers/radeon/radeon_llvm_emit.c b/src/gallium/drivers/radeon/radeon_llvm_emit.c
index d3f5ae3fab6..13633d33b04 100644
--- a/src/gallium/drivers/radeon/radeon_llvm_emit.c
+++ b/src/gallium/drivers/radeon/radeon_llvm_emit.c
@@ -81,21 +81,21 @@ void radeon_llvm_shader_type(LLVMValueRef F, unsigned type)
enum radeon_llvm_calling_convention calling_conv;
switch (type) {
- case TGSI_PROCESSOR_VERTEX:
- case TGSI_PROCESSOR_TESS_CTRL:
- case TGSI_PROCESSOR_TESS_EVAL:
+ case PIPE_SHADER_VERTEX:
+ case PIPE_SHADER_TESS_CTRL:
+ case PIPE_SHADER_TESS_EVAL:
llvm_type = RADEON_LLVM_SHADER_VS;
calling_conv = RADEON_LLVM_AMDGPU_VS;
break;
- case TGSI_PROCESSOR_GEOMETRY:
+ case PIPE_SHADER_GEOMETRY:
llvm_type = RADEON_LLVM_SHADER_GS;
calling_conv = RADEON_LLVM_AMDGPU_GS;
break;
- case TGSI_PROCESSOR_FRAGMENT:
+ case PIPE_SHADER_FRAGMENT:
llvm_type = RADEON_LLVM_SHADER_PS;
calling_conv = RADEON_LLVM_AMDGPU_PS;
break;
- case TGSI_PROCESSOR_COMPUTE:
+ case PIPE_SHADER_COMPUTE:
llvm_type = RADEON_LLVM_SHADER_CS;
calling_conv = RADEON_LLVM_AMDGPU_CS;
break;