summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers/radeon
diff options
context:
space:
mode:
authorVadim Girlin <[email protected]>2012-05-15 18:48:06 +0400
committerVadim Girlin <[email protected]>2012-05-15 18:48:06 +0400
commit63a85952711415ab151a39d21c4a67da97f2734e (patch)
treee5fd490b20726234dc6e9032a85e4f6dfa094fcb /src/gallium/drivers/radeon
parent0298238bdd65344b91731973902fb46530e74cca (diff)
radeon/llvm: use correct intrinsic for CEIL
Should be round_posinf instead of round_neginf. Signed-off-by: Vadim Girlin <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/R600Instructions.td4
-rw-r--r--src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td
index 9b59171de43..e145b9c8e94 100644
--- a/src/gallium/drivers/radeon/R600Instructions.td
+++ b/src/gallium/drivers/radeon/R600Instructions.td
@@ -312,8 +312,8 @@ def TRUNC : R600_1OP <
def CEIL : R600_1OP <
0x12, "CEIL",
- [(set R600_Reg32:$dst, (int_AMDIL_round_neginf R600_Reg32:$src))]> {
- let AMDILOp = AMDILInst.ROUND_NEGINF_f32;
+ [(set R600_Reg32:$dst, (int_AMDIL_round_posinf R600_Reg32:$src))]> {
+ let AMDILOp = AMDILInst.ROUND_POSINF_f32;
}
def RNDNE : R600_1OP <
diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
index 6e6fc3d12cd..0689b6a552a 100644
--- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
+++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
@@ -968,7 +968,7 @@ void radeon_llvm_context_init(struct radeon_llvm_context * ctx)
bld_base->op_actions[TGSI_OPCODE_TXQ].fetch_args = tex_fetch_args;
bld_base->op_actions[TGSI_OPCODE_TXQ].intr_name = "llvm.AMDGPU.txq";
bld_base->op_actions[TGSI_OPCODE_CEIL].emit = lp_build_tgsi_intrinsic;
- bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.AMDIL.round.neginf.";
+ bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.AMDIL.round.posinf.";