diff options
author | Marek Olšák <[email protected]> | 2017-04-13 23:46:59 +0200 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2017-04-17 01:22:11 +0200 |
commit | 2769dadb0fafdbafc98630fdf96924a3bb209ab7 (patch) | |
tree | d9c0efc32df89769482bd89dc295e570935a7390 /src/gallium/drivers/radeon | |
parent | f05f0bb5cbc8b3b11342158b63e7e20f1f6f7c81 (diff) |
gallium/radeon: always flush asynchronously and wait after begin_new_cs
This hides the overhead of everything in the driver after the CS flush and
before returning from pipe_context::flush.
Only microbenchmarks will benefit.
+2% FPS for glxgears.
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 47d4058e60a..ce84139a2f6 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -366,15 +366,13 @@ static void r600_flush_from_st(struct pipe_context *ctx, struct pipe_screen *screen = ctx->screen; struct r600_common_context *rctx = (struct r600_common_context *)ctx; struct radeon_winsys *ws = rctx->ws; - unsigned rflags = 0; struct pipe_fence_handle *gfx_fence = NULL; struct pipe_fence_handle *sdma_fence = NULL; bool deferred_fence = false; + unsigned rflags = RADEON_FLUSH_ASYNC; if (flags & PIPE_FLUSH_END_OF_FRAME) rflags |= RADEON_FLUSH_END_OF_FRAME; - if (flags & PIPE_FLUSH_DEFERRED) - rflags |= RADEON_FLUSH_ASYNC; /* DMA IBs are preambles to gfx IBs, therefore must be flushed first. */ if (rctx->dma.cs) @@ -383,7 +381,7 @@ static void r600_flush_from_st(struct pipe_context *ctx, if (!radeon_emitted(rctx->gfx.cs, rctx->initial_gfx_cs_size)) { if (fence) ws->fence_reference(&gfx_fence, rctx->last_gfx_fence); - if (!(rflags & RADEON_FLUSH_ASYNC)) + if (!(flags & PIPE_FLUSH_DEFERRED)) ws->cs_sync_flush(rctx->gfx.cs); } else { /* Instead of flushing, create a deferred fence. Constraints: @@ -419,6 +417,12 @@ static void r600_flush_from_st(struct pipe_context *ctx, screen->fence_reference(screen, fence, NULL); *fence = (struct pipe_fence_handle*)multi_fence; } + + if (!(flags & PIPE_FLUSH_DEFERRED)) { + if (rctx->dma.cs) + ws->cs_sync_flush(rctx->dma.cs); + ws->cs_sync_flush(rctx->gfx.cs); + } } static void r600_flush_dma_ring(void *ctx, unsigned flags, |