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authorNicolai Hähnle <[email protected]>2017-02-20 12:07:21 +0100
committerNicolai Hähnle <[email protected]>2017-02-21 10:45:13 +0100
commit066a117be77fdc2b29c8eafabb4e2c2fa902a18e (patch)
treec1df87726ea1b0fbc7c8571042e29a9e280ebde2 /src/gallium/drivers/radeon
parent6a1d9684f4ec1e1eed49bc14749be7b7784277ec (diff)
radeonsi: fix UINT/SINT clamping for 10-bit formats on <= CIK
The same PS epilog workaround as for 8-bit integer formats is required, since the CB doesn't do clamping. Fixes GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels*. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index e8dbf5d6d3c..a977dc18eb8 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -316,6 +316,7 @@ struct r600_surface {
bool alphatest_bypass;
bool export_16bpc;
bool color_is_int8;
+ bool color_is_int10;
/* Color registers. */
unsigned cb_color_info;