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authorMarek Olšák <[email protected]>2015-04-16 19:41:33 +0200
committerMarek Olšák <[email protected]>2015-08-14 15:02:28 +0200
commite7fc664b91a5d886c2709d05a498f6a1dfbaf136 (patch)
tree1f0939533c7d083a0ce671ea9c7ea9e316410961 /src/gallium/drivers/radeon
parent2eb067db0febcd71b4182153155e3e43f215624c (diff)
winsys/amdgpu: add addrlib - texture addressing and alignment calculator
This is an internal project that Catalyst uses and now open source will do too. v2: squashed these commits in: - winsys/amdgpu: fix warnings in addrlib - winsys/amdgpu: set PIPE_CONFIG and NUM_BANKS in tiling_flags
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c3
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h5
2 files changed, 6 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 57c40d96e2c..a4c7034cb37 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -243,10 +243,11 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
RADEON_LAYOUT_TILED : RADEON_LAYOUT_LINEAR,
surface->level[0].mode >= RADEON_SURF_MODE_2D ?
RADEON_LAYOUT_TILED : RADEON_LAYOUT_LINEAR,
+ surface->pipe_config,
surface->bankw, surface->bankh,
surface->tile_split,
surface->stencil_tile_split,
- surface->mtilea,
+ surface->mtilea, surface->num_banks,
surface->level[0].pitch_bytes,
(surface->flags & RADEON_SURF_SCANOUT) != 0);
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 6fa9ea4fdf2..616816ebcea 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -322,6 +322,8 @@ struct radeon_surf {
struct radeon_surf_level stencil_level[RADEON_SURF_MAX_LEVEL];
uint32_t tiling_index[RADEON_SURF_MAX_LEVEL];
uint32_t stencil_tiling_index[RADEON_SURF_MAX_LEVEL];
+ uint32_t pipe_config;
+ uint32_t num_banks;
};
struct radeon_winsys {
@@ -446,10 +448,11 @@ struct radeon_winsys {
struct radeon_winsys_cs *rcs,
enum radeon_bo_layout microtile,
enum radeon_bo_layout macrotile,
+ unsigned pipe_config,
unsigned bankw, unsigned bankh,
unsigned tile_split,
unsigned stencil_tile_split,
- unsigned mtilea,
+ unsigned mtilea, unsigned num_banks,
unsigned stride,
bool scanout);