diff options
author | Tom Stellard <[email protected]> | 2012-09-13 15:14:26 +0000 |
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committer | Tom Stellard <[email protected]> | 2012-09-21 19:30:57 +0000 |
commit | b282c9611e154254de38fbc0782885944f83384b (patch) | |
tree | 7647a1db18aa1bbdce9690a1b876221bb08eb8b6 /src/gallium/drivers/radeon | |
parent | aa8367dd13aa767b6af380d784380ed240dd9c8e (diff) |
radeon/llvm: Expand vector fadd and fmul on R600
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r-- | src/gallium/drivers/radeon/R600ISelLowering.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp index e84983df514..36ca2463427 100644 --- a/src/gallium/drivers/radeon/R600ISelLowering.cpp +++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp @@ -34,6 +34,9 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) : addRegisterClass(MVT::i32, &AMDGPU::R600_Reg32RegClass); computeRegisterProperties(); + setOperationAction(ISD::FADD, MVT::v4f32, Expand); + setOperationAction(ISD::FMUL, MVT::v4f32, Expand); + setOperationAction(ISD::BR_CC, MVT::i32, Custom); setOperationAction(ISD::BR_CC, MVT::f32, Custom); |