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authorMarek Olšák <[email protected]>2018-07-12 00:27:06 -0400
committerMarek Olšák <[email protected]>2018-07-16 13:32:33 -0400
commit6b1e0e51e6dbb896ec0dccc6e5dd1bb3e0f35c2b (patch)
tree9a511c7d4cd5717735c9ee3a201f6cc76ee3bf2f /src/gallium/drivers/radeon
parent54ad9b444c8e73da498211870e785239ad3ff1aa (diff)
radeonsi: rework RADEON_PRIO flags to be <= 31
This decreases sizeof(struct amdgpu_cs_buffer) from 24 to 16 bytes. Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon')
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h41
1 files changed, 21 insertions, 20 deletions
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index bcd6831ed35..406cfe46da3 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -115,50 +115,51 @@ enum radeon_value_id {
RADEON_CS_THREAD_TIME,
};
-/* Each group of four has the same priority. */
enum radeon_bo_priority {
+ /* Each group of two has the same priority. */
RADEON_PRIO_FENCE = 0,
RADEON_PRIO_TRACE,
- RADEON_PRIO_SO_FILLED_SIZE,
+
+ RADEON_PRIO_SO_FILLED_SIZE = 2,
RADEON_PRIO_QUERY,
RADEON_PRIO_IB1 = 4, /* main IB submitted to the kernel */
RADEON_PRIO_IB2, /* IB executed with INDIRECT_BUFFER */
- RADEON_PRIO_DRAW_INDIRECT,
+
+ RADEON_PRIO_DRAW_INDIRECT = 6,
RADEON_PRIO_INDEX_BUFFER,
- RADEON_PRIO_CP_DMA = 12,
+ RADEON_PRIO_CP_DMA = 8,
+ RADEON_PRIO_BORDER_COLORS,
- RADEON_PRIO_CONST_BUFFER = 16,
+ RADEON_PRIO_CONST_BUFFER = 10,
RADEON_PRIO_DESCRIPTORS,
- RADEON_PRIO_BORDER_COLORS,
- RADEON_PRIO_SAMPLER_BUFFER = 20,
+ RADEON_PRIO_SAMPLER_BUFFER = 12,
RADEON_PRIO_VERTEX_BUFFER,
- RADEON_PRIO_SHADER_RW_BUFFER = 24,
+ RADEON_PRIO_SHADER_RW_BUFFER = 14,
RADEON_PRIO_COMPUTE_GLOBAL,
- RADEON_PRIO_SAMPLER_TEXTURE = 28,
+ RADEON_PRIO_SAMPLER_TEXTURE = 16,
RADEON_PRIO_SHADER_RW_IMAGE,
- RADEON_PRIO_SAMPLER_TEXTURE_MSAA = 32,
-
- RADEON_PRIO_COLOR_BUFFER = 36,
+ RADEON_PRIO_SAMPLER_TEXTURE_MSAA = 18,
+ RADEON_PRIO_COLOR_BUFFER,
- RADEON_PRIO_DEPTH_BUFFER = 40,
+ RADEON_PRIO_DEPTH_BUFFER = 20,
- RADEON_PRIO_COLOR_BUFFER_MSAA = 44,
+ RADEON_PRIO_COLOR_BUFFER_MSAA = 22,
- RADEON_PRIO_DEPTH_BUFFER_MSAA = 48,
+ RADEON_PRIO_DEPTH_BUFFER_MSAA = 24,
- RADEON_PRIO_SEPARATE_META = 52,
+ RADEON_PRIO_SEPARATE_META = 26,
RADEON_PRIO_SHADER_BINARY, /* the hw can't hide instruction cache misses */
- RADEON_PRIO_SHADER_RINGS = 56,
+ RADEON_PRIO_SHADER_RINGS = 28,
- RADEON_PRIO_SCRATCH_BUFFER = 60,
- /* 63 is the maximum value */
+ RADEON_PRIO_SCRATCH_BUFFER = 30,
+ /* 31 is the maximum value */
};
struct winsys_handle;
@@ -223,7 +224,7 @@ enum radeon_feature_id {
struct radeon_bo_list_item {
uint64_t bo_size;
uint64_t vm_address;
- uint64_t priority_usage; /* mask of (1 << RADEON_PRIO_*) */
+ uint32_t priority_usage; /* mask of (1 << RADEON_PRIO_*) */
};
struct radeon_winsys {