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authorMarek Olšák <[email protected]>2017-02-27 22:25:43 +0100
committerMarek Olšák <[email protected]>2017-03-31 21:41:57 +0200
commit35aaccaf819db8eb41bcf8e971b54a5885e717d1 (patch)
tree53acf831038cf52ba37ee408b1129cd40a34c4b9 /src/gallium/drivers/radeon/radeon_winsys.h
parent322eb13f09e0bce7cf6ee92b6b036a1490630ce5 (diff)
radeonsi/gfx9: fix linear mipmap CPU access
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_winsys.h')
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 43f74f653e4..a19ece6634d 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -364,8 +364,8 @@ struct gfx9_surf_layout {
uint64_t surf_slice_size;
uint16_t surf_pitch; /* in blocks */
uint16_t surf_height;
- /* Y mipmap level offset in blocks. Only valid for LINEAR. */
- uint16_t surf_ymip_offset[RADEON_SURF_MAX_LEVELS];
+ /* Mipmap level offset within the slice in bytes. Only valid for LINEAR. */
+ uint32_t offset[RADEON_SURF_MAX_LEVELS];
uint16_t dcc_pitch_max; /* (mip chain pitch - 1) */