diff options
author | Marek Olšák <[email protected]> | 2016-10-26 17:43:19 +0200 |
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committer | Marek Olšák <[email protected]> | 2016-11-01 22:33:13 +0100 |
commit | 692f2640ab0c4c923a5ba12ff8526d2d1a3eefb1 (patch) | |
tree | 6f9cb3ddc0181a98fb17952cb83e181c0816eca4 /src/gallium/drivers/radeon/radeon_winsys.h | |
parent | 315eb0acb48a30f9a8defa73a78055e441b5ee6c (diff) |
gallium/radeon: replace radeon_surf_info::dcc_enabled with num_dcc_levels
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_winsys.h')
-rw-r--r-- | src/gallium/drivers/radeon/radeon_winsys.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 2330cddf631..f5b9f105836 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -283,7 +283,6 @@ struct radeon_surf_level { uint16_t nblk_y; uint32_t pitch_bytes; enum radeon_surf_mode mode; - bool dcc_enabled; }; struct radeon_surf { @@ -291,6 +290,11 @@ struct radeon_surf { unsigned blk_w:4; unsigned blk_h:4; unsigned bpe:5; + /* Number of mipmap levels where DCC is enabled starting from level 0. + * Non-zero levels may be disabled due to alignment constraints, but not + * the first level. + */ + unsigned num_dcc_levels:4; uint32_t flags; /* These are return values. Some of them can be set by the caller, but |