diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2015-10-21 00:10:36 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2015-10-24 00:42:01 +0200 |
| commit | afa357c3b01322df31034f84613a4d8401a9486e (patch) | |
| tree | 28c3d7a52bf4af94516d3230c85e3a4ccb9573a6 /src/gallium/drivers/radeon/radeon_winsys.h | |
| parent | edf6a4537c5febbe38780819df30cbfffc74c329 (diff) | |
radeonsi: Allocate buffers for DCC.
As the alignment requirements can be 32 KiB or more, also adding
an aligned buffer creation function.
DCC is disabled for textures that can be shared as sharing the
DCC buffers has not been implemented yet.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_winsys.h')
| -rw-r--r-- | src/gallium/drivers/radeon/radeon_winsys.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 5f13c1ebc26..0178643549e 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -332,6 +332,7 @@ struct radeon_surf_level { uint32_t nblk_z; uint32_t pitch_bytes; uint32_t mode; + uint64_t dcc_offset; }; struct radeon_surf { @@ -367,6 +368,10 @@ struct radeon_surf { uint32_t stencil_tiling_index[RADEON_SURF_MAX_LEVEL]; uint32_t pipe_config; uint32_t num_banks; + + uint64_t dcc_size; + uint64_t dcc_alignment; + bool dcc_enabled; }; struct radeon_bo_list_item { |