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authorChristian König <[email protected]>2015-03-26 09:52:37 +0100
committerChristian König <[email protected]>2015-05-22 10:17:24 +0200
commit2b40c306d238e2e738d8901e10f351a109b02687 (patch)
treeedccc95124361fcd6d5a03a4d4c68465da28e18d /src/gallium/drivers/radeon/radeon_vce.c
parent7c1a00174b2bec102030b19b6094ebcab23fe04d (diff)
radeon/vce: move CPB handling function into common code
They are not firmware version dependent. Signed-off-by: Christian König <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_vce.c')
-rw-r--r--src/gallium/drivers/radeon/radeon_vce.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index e220f40165b..9913c8b4f1a 100644
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -183,6 +183,44 @@ static unsigned get_cpb_num(struct rvce_encoder *enc)
}
/**
+ * Get the slot for the currently encoded frame
+ */
+struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc)
+{
+ return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.prev, list);
+}
+
+/**
+ * Get the slot for L0
+ */
+struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc)
+{
+ return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next, list);
+}
+
+/**
+ * Get the slot for L1
+ */
+struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc)
+{
+ return LIST_ENTRY(struct rvce_cpb_slot, enc->cpb_slots.next->next, list);
+}
+
+/**
+ * Calculate the offsets into the CPB
+ */
+void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
+ unsigned *luma_offset, unsigned *chroma_offset)
+{
+ unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128);
+ unsigned vpitch = align(enc->luma->npix_y, 16);
+ unsigned fsize = pitch * (vpitch + vpitch / 2);
+
+ *luma_offset = slot->index * fsize;
+ *chroma_offset = *luma_offset + pitch * vpitch;
+}
+
+/**
* destroy this video encoder
*/
static void rvce_destroy(struct pipe_video_codec *encoder)