diff options
author | Boyuan Zhang <[email protected]> | 2015-07-08 16:54:48 -0400 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2015-08-14 15:02:31 +0200 |
commit | 839bf82606ae9c7b1c7d8d5055ab5e3cadae9bf9 (patch) | |
tree | 9307491fc3189e31e067f31013d316ee91f15941 /src/gallium/drivers/radeon/radeon_uvd.h | |
parent | 0654a9ca17c17fe140f70d126c878a0ce4736b76 (diff) |
radeon/uvd: implement HEVC support
add context buffer to fix H265 uvd decode issue.
fix H265 corruption issue caused by incorrect assigned ref_pic_list.
v2: disable interlace for HEVC
add CZ sps flag workaround
fix coding style
Signed-off-by: Christian König <[email protected]>
Signed-off-by: Boyuan Zhang <[email protected]>
Reviewed-by: Leo Liu <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_uvd.h')
-rw-r--r-- | src/gallium/drivers/radeon/radeon_uvd.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/radeon_uvd.h b/src/gallium/drivers/radeon/radeon_uvd.h index 5b6c65c81b0..452fbd60880 100644 --- a/src/gallium/drivers/radeon/radeon_uvd.h +++ b/src/gallium/drivers/radeon/radeon_uvd.h @@ -63,6 +63,7 @@ #define RUVD_CMD_FEEDBACK_BUFFER 0x00000003 #define RUVD_CMD_BITSTREAM_BUFFER 0x00000100 #define RUVD_CMD_ITSCALING_TABLE_BUFFER 0x00000204 +#define RUVD_CMD_CONTEXT_BUFFER 0x00000206 /* UVD message types */ #define RUVD_MSG_CREATE 0 @@ -75,6 +76,7 @@ #define RUVD_CODEC_MPEG2 0x00000003 #define RUVD_CODEC_MPEG4 0x00000004 #define RUVD_CODEC_H264_PERF 0x00000007 +#define RUVD_CODEC_H265 0x00000010 /* UVD decode target buffer tiling mode */ #define RUVD_TILE_LINEAR 0x00000000 @@ -173,6 +175,66 @@ struct ruvd_h264 { } mvc; }; +struct ruvd_h265 { + uint32_t sps_info_flags; + uint32_t pps_info_flags; + + uint8_t chroma_format; + uint8_t bit_depth_luma_minus8; + uint8_t bit_depth_chroma_minus8; + uint8_t log2_max_pic_order_cnt_lsb_minus4; + + uint8_t sps_max_dec_pic_buffering_minus1; + uint8_t log2_min_luma_coding_block_size_minus3; + uint8_t log2_diff_max_min_luma_coding_block_size; + uint8_t log2_min_transform_block_size_minus2; + + uint8_t log2_diff_max_min_transform_block_size; + uint8_t max_transform_hierarchy_depth_inter; + uint8_t max_transform_hierarchy_depth_intra; + uint8_t pcm_sample_bit_depth_luma_minus1; + + uint8_t pcm_sample_bit_depth_chroma_minus1; + uint8_t log2_min_pcm_luma_coding_block_size_minus3; + uint8_t log2_diff_max_min_pcm_luma_coding_block_size; + uint8_t num_extra_slice_header_bits; + + uint8_t num_short_term_ref_pic_sets; + uint8_t num_long_term_ref_pic_sps; + uint8_t num_ref_idx_l0_default_active_minus1; + uint8_t num_ref_idx_l1_default_active_minus1; + + int8_t pps_cb_qp_offset; + int8_t pps_cr_qp_offset; + int8_t pps_beta_offset_div2; + int8_t pps_tc_offset_div2; + + uint8_t diff_cu_qp_delta_depth; + uint8_t num_tile_columns_minus1; + uint8_t num_tile_rows_minus1; + uint8_t log2_parallel_merge_level_minus2; + + uint16_t column_width_minus1[19]; + uint16_t row_height_minus1[21]; + + int8_t init_qp_minus26; + uint8_t num_delta_pocs_ref_rps_idx; + uint8_t curr_idx; + uint8_t reserved1; + int32_t curr_poc; + uint8_t ref_pic_list[16]; + int32_t poc_list[16]; + uint8_t ref_pic_set_st_curr_before[8]; + uint8_t ref_pic_set_st_curr_after[8]; + uint8_t ref_pic_set_lt_curr[8]; + + uint8_t ucScalingListDCCoefSizeID2[6]; + uint8_t ucScalingListDCCoefSizeID3[2]; + + uint8_t highestTid; + uint8_t isNonRef; +}; + struct ruvd_vc1 { uint32_t profile; uint32_t level; @@ -329,6 +391,7 @@ struct ruvd_msg { union { struct ruvd_h264 h264; + struct ruvd_h265 h265; struct ruvd_vc1 vc1; struct ruvd_mpeg2 mpeg2; struct ruvd_mpeg4 mpeg4; |