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authorChristian König <[email protected]>2017-01-16 15:04:47 +0100
committerChristian König <[email protected]>2017-03-13 08:51:29 +0100
commit88f34510832d4468fe887b6383d2006d9b85fb9b (patch)
tree621a9f179109f5a239ebb54b55390390c7f0437e /src/gallium/drivers/radeon/radeon_uvd.c
parent3e1e441aa05069e3eee906144cf96898e0b802e2 (diff)
radeon/uvd: enable 10bit HEVC decode v2
Just use whatever the state tracker allocated. v2: fix msb mode Signed-off-by: Christian König <[email protected]> Reviewed-by: Mark Thompson <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_uvd.c')
-rw-r--r--src/gallium/drivers/radeon/radeon_uvd.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 7a08c81cbc0..610416be4d7 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -704,13 +704,16 @@ static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video
result.direct_reflist[i][j] = pic->RefPicList[i][j];
}
- if ((pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) &&
- (target->buffer_format == PIPE_FORMAT_NV12)) {
- result.p010_mode = 0;
- result.luma_10to8 = 5;
- result.chroma_10to8 = 5;
- result.sclr_luma10to8 = 4;
- result.sclr_chroma10to8 = 4;
+ if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
+ if (target->buffer_format == PIPE_FORMAT_P016) {
+ result.p010_mode = 1;
+ result.msb_mode = 1;
+ } else {
+ result.luma_10to8 = 5;
+ result.chroma_10to8 = 5;
+ result.sclr_luma10to8 = 4;
+ result.sclr_chroma10to8 = 4;
+ }
}
/* TODO