diff options
| author | Marek Olšák <[email protected]> | 2016-06-03 19:56:38 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2016-06-08 00:22:45 +0200 |
| commit | 60e93ddd0675e525333ae928e94be31b973409de (patch) | |
| tree | b3e2804c489564c5c2362248d9d887e3d3f2b3ba /src/gallium/drivers/radeon/r600_texture.c | |
| parent | a01536a29fdebfcdf7781e28a66b3b2abba943c8 (diff) | |
radeonsi: compute DCC register parameters in si_emit_framebuffer_state
This will get more complicated with mipmapped DCC or when DCC is enabled
after allocation.
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/r600_texture.c')
| -rw-r--r-- | src/gallium/drivers/radeon/r600_texture.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index ca91c37ae17..37f8e023c09 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -405,7 +405,6 @@ static bool r600_texture_discard_dcc(struct r600_common_screen *rscreen, /* Disable DCC. */ rtex->dcc_offset = 0; - rtex->cb_color_info &= ~VI_S_028C70_DCC_ENABLE(1); /* Notify all contexts about the change. */ r600_dirty_all_framebuffer_states(rscreen); @@ -1056,7 +1055,6 @@ r600_texture_create_object(struct pipe_screen *screen, /* Reserve space for the DCC buffer. */ rtex->dcc_offset = align64(rtex->size, rtex->surface.dcc_alignment); rtex->size = rtex->dcc_offset + rtex->surface.dcc_size; - rtex->cb_color_info |= VI_S_028C70_DCC_ENABLE(1); } } |