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authorMarek Olšák <[email protected]>2016-06-06 01:29:14 +0200
committerMarek Olšák <[email protected]>2016-06-08 00:22:45 +0200
commitd4d733e39de2fc75aaa17d95998abdf19219cb38 (patch)
tree3eb8b74370b9e5e9a8c642bf41f1f0c4eb9fea58 /src/gallium/drivers/radeon/r600_texture.c
parentb42bc90b6add0d0f81d915d49712761d32329afa (diff)
gallium/radeon: don't allocate DCC for non-renderable texture formats
R9G9B9E5 is the only uncompressed one hopefully. This fixes incorrect rendering not discovered (due to a lack of tests) until DCC mipmapping was enabled. Cc: 11.1 11.2 12.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers/radeon/r600_texture.c')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 920cc213b6c..0f72a6d64af 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -281,6 +281,11 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
if (rscreen->chip_class >= SI) {
surface->flags |= RADEON_SURF_HAS_TILE_MODE_INDEX;
}
+
+ if (rscreen->chip_class >= VI &&
+ ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT)
+ surface->flags |= RADEON_SURF_DISABLE_DCC;
+
return 0;
}